WireWorld Computer

The computer in WireWorld is a fully functional design.

The original computer dates from 1992 and is the work of David Moore and Mark Owen, with the help of many others.

The computer is (from top to bottom) build up from: a seven-segment 5-digit display module, a binary-to-BCD converter, a registerbank with 64 registers, a control unit containing a read pulse generator and a write pulse generator, and a master clock unit.

The original computer takes 1152 generations for a single cycle. This is composed of 768 generations to go through the register bank (6 x 64 x 2) and 384 generations for the control and address processing unit. This is the same as 12 loops of 96 generations each.

The landscape version of the original computer is specially created to accomodate the favorite 800x600 computer screen size, and can be used as Windows background. This computer has exactly the same functionality as the original computer.

The fast-cycle computer was designed by Ty Finally in 2024.

The fast-cycle computer takes only 10 loops, or 960 generations, for a single cycle, instead of the 12 loops of the original computer. The control and address processing unit timing is shortened from 384 generations to 192 generations. The arithmetic logic unit is revised and extended by two registers for added functionality:

• The AND-NOT function has been removed
• A group of 3 registers perform the AND and OR function
• A group of 3 registers perform the XOR and SUM function

There is a 6-bit binary display added on the left for debug purposes, for displaying the 6-bit instruction pointer. The original 5-digit display module is, temporarily, replaced by a 16-bit binary display on the top, for displaying the output value of register 0.

This fast-cycle computer works like a charm but is not quite complete. A new design of the binary-to-BCD converter and the original 5-digit display module will be added at some moment in time, when I feel the need to do so.

The immediate-addressing-mode computer was designed by Ty Finally in 2024.

The original computer supports only absolute addressing mode. This is certainly the best solution if you are trying to build the first turing-complete computer within a new system, i.e. WireWorld. But once you now all ins and outs of the WireWorld computer it is "fairly easy" to extend the computer with an immediate addressing mode.

This modified design has the normal absolute addressing mode, which takes two read cycles to complete. The first cycle is to read the instruction and the second cycle to read the data. Writing the data is asynchronous and this has no influence on the inner working of the computer.

When the immediate addressing mode is used there is only one read cycle involved, reading both the instruction and the data to be written. The second half of the read instruction still contains the write address. The first half of the instruction however does not contain the read address but is filled with the byte value to be written. This byte value is actually presented as ones complement, so it can contain the values -127 thru 127.

The only catch with the immediate addressing mode is that we are back to 12 loops per cycle, or 1152 generations. The advantage is however that with this addressing mode there is less need for storage of constants in separate registers. The computer speeds also up when using the immediate addressing mode, so overall it performs as fast as the fast-cycle computer.

The direct-jump computer was designed by Ty Finally in 2024.

Orignally a "jump delay slot" was introduced, because of the time it took to write the data back to the registers. This can easily be solved at the cost of many more generations while waiting for the data to be written.

This modified version has however a "jump detector". So, as soon as a jump is initiated by an instruction the "jump detector" sees this. Then it catches the next read cycle and uses the data to fill the instruction pointer with the new address.

This direct-jump computer is an extension from the immediate computer, so both options are now build in. Fortunatly the number of loops per cycle is still 12, or 1152 generations.

This website contains my take on the marvelous WireWorld Computer
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Last update: April 20th 2025