The computer in WireWorld is a fully functional design.
The original computer dates from 1992 and is the work of David Moore and Mark Owen, with the help of many others.
The computer is (from top to bottom) build up from: a seven-segment 5-digit display module, a binary-to-BCD converter, a registerbank with 64 registers, a control unit containing a read pulse generator and a write pulse generator, and a master clock unit.
The landscape version of the original computer is specially created to accomodate the favorite 800x600 computer screen size, and can be used as Windows background.
This computer has exact the same functionality as the original computer.
The fast-cycle computer was designed by Ty Finally in 2024.
The Original Computer (see above) needs 1152 generations for a single cycle. Namely 768 generations to go once up and down the register bank and 384 generations for controlling and using the address processing units. You can also say the original computer takes 12 loops of 96 generations each, because 12 x 96 = 1152.
The fast-cycle computer takes only 10 loops, or 960 generations, for a single cycle, and uses therefore about 16% less generations per cycle than the Original Computer.
This computer is not complete yet, because it is lacking the seven-segment 5-digit display module, a binary-to-BCD converter, a registerbank and a master clock unit. They will be added soon.
The immediate-addressing-mode computer was designed by Ty Finally in 2024.
Originally only an absolute addressing mode is supported. This is the best solution if you are trying to build the first turing-complete computer within a new system, i.e. WireWorld. But once you now how WireWorld works it is "fairly easy" to extend the computer with an immediate addressing mode. It takes some time and some effort, but the result is impressive.
This modified design has the normal absolute addressing mode, which takes two cycles to complete. The first cycle to read the instruction and the second cycle to read the data. Writing the data is asynchronous and this has no influence on the working of the computer.
With the immediate addressing mode there is only a single read cycle involved. In this mode the write address is, as always, the second part of the instruction, while the first part is filled with the byte value to be written.
The only catch with the immediate addressing mode is that we are back to 12 loops per cycle, or 1152 generations. The advantage is however that with the immediate addressing mode the computer works potentially twice as fast.
This computer is lacking some parts either.
The direct-jump computer was designed by Ty Finally in 2024.
Orignally a "jump delay slot" was introduced, because of the time it took to write the data to the registers. This can be easily solved at a cost of a lot more generations per cycle.
This modified version has however a "jump detector". So, as soon as a jump is initiated by an instruction the "jump detector" sees this. Then it catches the next read cycle and uses the data to fill the instruction pointer with the new address.
This direct-jump computer is an extension from the immediate computer, so both options are now build in.
The number of loops per cycle is still 12, or 1152 generations, so no extra generations are necessary.
This computer is lacking some parts either.
This website contains my take on the marvelous WireWorld Computer
For questions, remarks or useful supplements (sorry, no javascript available)
Last update: Oktober 22nd 2024
